Отправлено kolja 12 июля 2004 г. 11:17 В ответ на: А нельзя узнать, кто и где не рекомендует? отправлено 777 11 июля 2004 г. 08:54

05000143
A read from external memory may return a wrong value with data cache enabled: Description: In the following extremely rare situation a read from external memory may return a wrong value. With Data Cache enabled, a core store must target byte "A" which is allocated to a Fill Buffer(allocated previously or by this store). No further core stores may take place until: The line which contains byte "A" is victimized or flush-invalidated and the core performs a cacheable read which loads a byte "B" into the same set, way, and Fill Buffer as was used to load byte "A". When byte "B" drains from the Fill Buffer to L1 cache memory, it must be stalled due to a collision with a higher priority use of a subbank. When all of the conditions described above are satisfied, byte "B" will be incorrectly stored in L1 cache, and incorrectly returned to the core when read. If the cache line which should have contained byte "B" is ever copied back to external memory, the source memory will also be corrupted.

Workaround: Do not write to cacheable external memory addresses.
This will be fixed in the next silicon revision.

Applies to revision(s): ADSP-BF533-0.1, ADSP-BF533-0.2