[an error occurred while processing this directive]
flash.cmd: .codestart : > BEGIN PAGE = 0
(«Телесистемы»: Конференция «Цифровые сигнальные процессоры (DSP) и их применение»)

миниатюрный аудио-видеорекордер mAVR

Отправлено _гоша_ 16 июля 2004 г. 17:45
В ответ на: Ответ: Делал по SPRA958 - Running an Application from Internal Flash Memory on the TMS320F281x DSP отправлено _Alex-J_ 16 июля 2004 г. 16:43

MEMORY
{
PAGE 0: /* Program Memory */
/* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE1 for data allocation */
RAML0 : origin = 0x008000, length = 0x001000 /* on-chip RAM block L0 */
OTP : origin = 0x3D7800, length = 0x000800 /* on-chip OTP */
FLASHJ : origin = 0x3D8000, length = 0x002000 /* on-chip FLASH */
FLASHI : origin = 0x3DA000, length = 0x002000 /* on-chip FLASH */
FLASHH : origin = 0x3DC000, length = 0x004000 /* on-chip FLASH */
FLASHG : origin = 0x3E0000, length = 0x004000 /* on-chip FLASH */
FLASHF : origin = 0x3E4000, length = 0x004000 /* on-chip FLASH */
FLASHE : origin = 0x3E8000, length = 0x004000 /* on-chip FLASH */
FLASHD : origin = 0x3EC000, length = 0x004000 /* on-chip FLASH */
FLASHC : origin = 0x3F0000, length = 0x004000 /* on-chip FLASH */
FLASHA : origin = 0x3F6000, length = 0x001F80 /* on-chip FLASH */
CSM_RSVD : origin = 0x3F7F80, length = 0x000076 /* Part of FLASHA. Program with all 0x0000 when CSM is in use. */
BEGIN : origin = 0x3F7FF6, length = 0x000002 /* Part of FLASHA. Used for "boot to Flash" bootloader mode. */
CSM_PWL : origin = 0x3F7FF8, length = 0x000008 /* Part of FLASHA. CSM password locations in FLASHA */
ROM : origin = 0x3FF000, length = 0x000FC0 /* Boot ROM available if MP/MCn=0 */
RESET : origin = 0x3FFFC0, length = 0x000002 /* part of boot ROM (MP/MCn=0) or XINTF zone 7 (MP/MCn=1) */
VECTORS : origin = 0x3FFFC2, length = 0x00003E /* part of boot ROM (MP/MCn=0) or XINTF zone 7 (MP/MCn=1) */
PAGE 1 :
M0RAM(RW) : origin = 0x000000, length = 0x400
M1RAM(RW) : origin = 0x000400, length = 0x400
PIEVT(RW) : origin = 0x000d02, length = 0xfe
L0L1RAM(RW) : origin = 0x008000, length = 0x2000
FLASHB : origin = 0x3F4000, length = 0x002000 /* on-chip FLASH */

PAGE 1 : DEV_EMU : origin = 0x000880, length = 0x000180 /* device emulation registers */
PAGE 1 : FLASH_REGS : origin = 0x000A80, length = 0x000060 /* FLASH registers */
PAGE 1 : CSM : origin = 0x000AE0, length = 0x000010 /* code security module registers */
PAGE 1 : XINTF : origin = 0x000B20, length = 0x000020 /* external interface registers */
PAGE 1 : CPU_TIMER0 : origin = 0x000C00, length = 0x000008 /* CPU Timer0 registers (CPU Timer1 and Timer2 are reserved for BIOS)*/
PAGE 1 : CPU_TIMER1 : origin = 0x000C08, length = 0x000008 /* CPU Timer0 registers (CPU Timer1 and Timer2 are reserved for BIOS)*/
PAGE 1 : CPU_TIMER2 : origin = 0x000C10, length = 0x000008 /* CPU Timer0 registers (CPU Timer1 and Timer2 are reserved for BIOS)*/
PAGE 1 : PIE_CTRL : origin = 0x000CE0, length = 0x000020 /* PIE control registers */
PAGE 1 : ECANA : origin = 0x006000, length = 0x000040 /* eCAN control and status registers */
PAGE 1 : ECANA_LAM : origin = 0x006040, length = 0x000040 /* eCAN local acceptance masks */
PAGE 1 : ECANA_MOTS : origin = 0x006080, length = 0x000040 /* eCAN message object time stamps */
PAGE 1 : ECANA_MOTO : origin = 0x0060C0, length = 0x000040 /* eCAN object time-out registers */
PAGE 1 : ECANA_MBOX : origin = 0x006100, length = 0x000100 /* eCAN mailboxes */
PAGE 1 : SYSTEM : origin = 0x007010, length = 0x000020 /* System control registers */
PAGE 1 : SPIA : origin = 0x007040, length = 0x000010 /* SPI registers */
PAGE 1 : SCIA : origin = 0x007050, length = 0x000010 /* SCI-A registers */
PAGE 1 : XINTRUPT : origin = 0x007070, length = 0x000010 /* external interrupt registers */
PAGE 1 : GPIOMUX : origin = 0x0070C0, length = 0x000020 /* GPIO mux registers */
PAGE 1 : GPIODAT : origin = 0x0070E0, length = 0x000020 /* GPIO data registers */
PAGE 1 : ADC : origin = 0x007100, length = 0x000020 /* ADC registers */
PAGE 1 : EVA : origin = 0x007400, length = 0x000040 /* Event Manager A registers */
PAGE 1 : EVB : origin = 0x007500, length = 0x000040 /* Event Manager B registers */
PAGE 1 : SCIB : origin = 0x007750, length = 0x000010 /* SCI-B registers */
PAGE 1 : MCBSPA : origin = 0x007800, length = 0x000040 /* McBSP registers */
PAGE 1 : CSM_PWL : origin = 0x3F7FF8, length = 0x000008 /* Part of FLASHA. CSM password locations. */
}
SECTIONS
{
/* 22-bit program sections */
.reset : > RESET PAGE = 0, TYPE = DSECT
.cinit : > FLASHC PAGE = 0
.pinit : > FLASHC, PAGE = 0
.text : > FLASHC PAGE = 0
IQmath : load = FLASHC,PAGE = 0
IQmathTables : load = FLASHC,PAGE = 0
.codestart : > BEGIN PAGE = 0
.boot > FLASHA
{-lrts2800_ml.lib (.text)}
/* 16-Bit data sections */
.const : > FLASHC, PAGE = 0
.bss : > L0L1RAM PAGE = 1
.stack : > M1RAM PAGE = 1
.sysmem : > M0RAM, PAGE = 1
/* 32-bit data sections */
.vectors : > PIEVT, PAGE = 1, TYPE = DSECT
.ebss : > L0L1RAM PAGE = 1
.econst : > FLASHC PAGE = 0
.esysmem : > L0L1RAM, PAGE = 1

/* Initalized sections go in Flash */
/* For SDFlash to program these, they must be allocated to page 0 */

.switch : > FLASHC PAGE = 0


/*.vectors : > VECTORS PAGE = 0, TYPE = DSECT */
/*** Peripheral Frame 0 Register Structures ***/
DevEmuRegsFile : > DEV_EMU, PAGE = 1
FlashRegsFile : > FLASH_REGS, PAGE = 1
CsmRegsFile : > CSM, PAGE = 1
XintfRegsFile : > XINTF, PAGE = 1
CpuTimer0RegsFile : > CPU_TIMER0, PAGE = 1
CpuTimer1RegsFile : > CPU_TIMER1, PAGE = 1
CpuTimer2RegsFile : > CPU_TIMER2, PAGE = 1
PieCtrlRegsFile : > PIE_CTRL, PAGE = 1

/*** Peripheral Frame 1 Register Structures ***/
SysCtrlRegsFile : > SYSTEM, PAGE = 1
SpiaRegsFile : > SPIA, PAGE = 1
SciaRegsFile : > SCIA, PAGE = 1
XIntruptRegsFile : > XINTRUPT, PAGE = 1
GpioMuxRegsFile : > GPIOMUX, PAGE = 1
GpioDataRegsFile : > GPIODAT PAGE = 1
AdcRegsFile : > ADC, PAGE = 1
EvaRegsFile : > EVA, PAGE = 1
EvbRegsFile : > EVB, PAGE = 1
ScibRegsFile : > SCIB, PAGE = 1
McbspaRegsFile : > MCBSPA, PAGE = 1

/*** Peripheral Frame 2 Register Structures ***/
ECanaRegsFile : > ECANA, PAGE = 1
ECanaLAMRegsFile : > ECANA_LAM PAGE = 1
ECanaMboxesFile : > ECANA_MBOX PAGE = 1
ECanaMOTSRegsFile : > ECANA_MOTS PAGE = 1
ECanaMOTORegsFile : > ECANA_MOTO PAGE = 1

/*** Code Security Module Register Structures ***/
CsmPwlFile : > CSM_PWL, PAGE = 1
}

Составить ответ  |||  Конференция  |||  Архив

Ответы


Отправка ответа

Имя (обязательно): 
Пароль: 
E-mail: 

Тема (обязательно):
Сообщение:

Ссылка на URL: 
Название ссылки: 

URL изображения: 


Перейти к списку ответов  |||  Конференция  |||  Архив  |||  Главная страница  |||  Содержание  |||  Без кадра

E-mail: info@telesys.ru