.ldf -> .ach («Телесистемы»: Конференция «Цифровые сигнальные процессоры (DSP) и их применение»)

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Отправлено Lieta 22 июля 2002 г. 00:26

Pomogite, pozhalsta, peredelatj sledujushij .ldf fail v .ach. Ili prishljitje primer s pohozhim .ldf failom. Default variant, kotorij v VisualDSP vpolne podoidjot. Struktura kazhetsa u .ach prostaja, no on vrode kak iz .sys faila poluchajetsa, a .sys, v svoju ocheredj slozhneje, nehochetsa kopatsa.

ARCHITECTURE(ADSP-2186)

SEARCH_DIR( $ADI_DSP\218x\lib )

// specific code and data
//

// Libraries from the command line are included in COMMAND_LINE_OBJECTS.
$OBJECTS = 218x_int_tab.doj , 218x_hdr.doj , $COMMAND_LINE_OBJECTS , libio.dlb , libc.dlb ;

// 2186 has 8K words of 24-bit internal Program RAM and 8K words of
// 16-bit internal Data RAM the commented mem_pmovly and mem_dmovly
// would be to map the external overlay pages mem_pmpage1,2 and
// mem_dmpage1,2 (these pages are unused in this default ldf)

MEMORY
{

// The memory section where the reset vector resides
mem_INT_RSTI { TYPE(PM RAM) START(0x000000) END(0x000003) WIDTH(24) }

// The memory sections where the interrupt vector code
// resides.
mem_INT_IRQ2 { TYPE(PM RAM) START(0x000004) END(0x000007) WIDTH(24) }
mem_INT_IRQL1 { TYPE(PM RAM) START(0x000008) END(0x00000B) WIDTH(24) }
mem_INT_IRQL0 { TYPE(PM RAM) START(0x00000c) END(0x00000F) WIDTH(24) }
mem_INT_SPORT0X { TYPE(PM RAM) START(0x000010) END(0x000013) WIDTH(24) }
mem_INT_SPORT0R { TYPE(PM RAM) START(0x000014) END(0x000017) WIDTH(24) }
mem_INT_IRQE { TYPE(PM RAM) START(0x000018) END(0x00001B) WIDTH(24) }
mem_INT_BDMA { TYPE(PM RAM) START(0x00001C) END(0x00001F) WIDTH(24) }
mem_INT_IRQ1 { TYPE(PM RAM) START(0x000020) END(0x000023) WIDTH(24) }
mem_INT_IRQ0 { TYPE(PM RAM) START(0x000024) END(0x000027) WIDTH(24) }
mem_INT_TIMER { TYPE(PM RAM) START(0x000028) END(0x00002B) WIDTH(24) }
mem_INT_PWRDWN { TYPE(PM RAM) START(0x00002C) END(0x00002F) WIDTH(24) }

mem_code { TYPE(PM RAM) START(0x00030) END(0x01fff) WIDTH(24) }
mem_data1 { TYPE(DM RAM) START(0x02000) END(0x037ff) WIDTH(16) }
mem_heap { TYPE(DM RAM) START(0x03800) END(0x03bff) WIDTH(16) }
mem_stack { TYPE(DM RAM) START(0x03c00) END(0x03fdf) WIDTH(16) }
} // MEMORY

PROCESSOR p0
{
LINK_AGAINST( $COMMAND_LINE_LINK_AGAINST)
OUTPUT( $COMMAND_LINE_OUTPUT_FILE )

SECTIONS
{

sec_INT_RSTI {
INPUT_SECTIONS ( $OBJECTS( IVreset ) )
} > mem_INT_RSTI

sec_INT_IRQ2 {
INPUT_SECTIONS ( $OBJECTS( IVirq2 ) )
} > mem_INT_IRQ2

sec_INT_IRQL1 {
INPUT_SECTIONS ( $OBJECTS( IVirql1 ) )
} > mem_INT_IRQL1

sec_INT_IRQL0 {
INPUT_SECTIONS ( $OBJECTS( IVirql0 ) )
} > mem_INT_IRQL0

sec_INT_SPORT0X {
INPUT_SECTIONS ( $OBJECTS( IVsport0xmit ) )
} > mem_INT_SPORT0X

sec_INT_SPORT0R {
INPUT_SECTIONS ( $OBJECTS( IVsport0recv ) )
} > mem_INT_SPORT0R

sec_INT_IRQE {
INPUT_SECTIONS ( $OBJECTS( IVirqe ) )
} > mem_INT_IRQE

sec_INT_BDMA {
INPUT_SECTIONS ( $OBJECTS( IVbdma ) )
} > mem_INT_BDMA

sec_INT_IRQ1 {
INPUT_SECTIONS ( $OBJECTS( IVirq1 ) )
} > mem_INT_IRQ1

sec_INT_IRQ0 {
INPUT_SECTIONS ( $OBJECTS( IVirq0 ) )
} > mem_INT_IRQ0

sec_INT_TIMER {
INPUT_SECTIONS ( $OBJECTS( IVtimer ) )
} > mem_INT_TIMER

sec_INT_PWRDWN {
INPUT_SECTIONS ( $OBJECTS( IVpwrdwn ) )
} > mem_INT_PWRDWN

sec_code
{
INPUT_SECTIONS( $OBJECTS(program) )
} > mem_code

sec_data1
{
INPUT_SECTIONS( $OBJECTS(data1) )
} > mem_data1

// provide linker variables describing the stack (grows down)
// ldf_stack_limit is the lowest address in the stack
// ldf_stack_base is the highest address in the stack
sec_stack
{
ldf_stack_limit = .;
ldf_stack_base = . + MEMORY_SIZEOF(mem_stack) - 1;
} > mem_stack

sec_heap
{
.heap = .;
.heap_size = MEMORY_SIZEOF(mem_heap);
.heap_end = . + MEMORY_SIZEOF(mem_heap) - 1;
} > mem_heap
} // SECTIONS
} // PROCESSOR p0