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Вот и уменя 300 мГц CLKEMIF - 300/2
SPRA924a
2.3 Maximize the EMIF Clock Frequency
The C5501/02 EMIF has a specified maximum clock frequency of 100 MHz. The EMIF clock can
be derived internally from the CPU clock or it can be provided from an external clock source.
Furthermore, the CPU clock can be divided by one, two, or four to achieve the EMIF frequency.
When generating the EMIF clock internally, the smallest divider value that will generate the largest EMIF clock frequency should be used to divide the CPU clock. For example:
• When running the CPU at 300 MHz, a divider value of 4 should be used to generate the
EMIF clock frequency from the CPU clock. In this case, the EMIF will run at 75MHz.
• When running the CPU at 200 MHz, a divider value of 2 should be used to generate the EMIF clock frequency from the CPU clock. In this case, the EMIF will run at 100MHz.
Details on the different clocking configurations for the EMIF are provided below.The C5501 and C5502 have four clock groups: the C55x Subsystem Clock Group, the Fast
Peripherals Clock Group, the Slow Peripherals Clock Group, and the External Memory Interface Clock Group. Clock groups allow for performance optimization and lower power since the frequency of groups with no high-speed requirements can be set to 1/4 or 1/2 the frequency of other groups.
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