Отправлено SM 23 июля 2003 г. 12:14 В ответ на: Ответ: (+) отправлено SM 23 июля 2003 г. 10:35

shl и shr заменить на C-шные сдвиги.

initBSP:
		mov	#0,port(#SPCR1_1)
		mov	#0,port(#SPCR2_1)
		mov	#0,port(#RCR1_1)
		mov	#0,port(#RCR2_1)
		mov	#0,port(#XCR1_1)
		mov	#0,port(#XCR2_1)
		mov	#1,port(#SRGR1_1)
		mov	#2000h,port(#SRGR2_1)
		mov	#0,port(#MCR1_1)
		mov	#0,port(#MCR2_1)
		mov	#0,port(#RCERA_1)
		mov	#0,port(#RCERB_1)
		mov	#0,port(#RCERC_1)
		mov	#0,port(#RCERD_1)
		mov	#0,port(#RCERE_1)
		mov	#0,port(#RCERF_1)
		mov	#0,port(#RCERG_1)
		mov	#0,port(#RCERH_1)
		mov	#0,port(#XCERA_1)
		mov	#0,port(#XCERB_1)
		mov	#0,port(#XCERC_1)
		mov	#0,port(#XCERD_1)
		mov	#0,port(#XCERE_1)
		mov	#0,port(#XCERF_1)
		mov	#0,port(#XCERG_1)
		mov	#0,port(#XCERH_1)
		mov	#0,port(#PCR1)
		
		rpt	#3ffh
		nop
			;FEDCBA9876543210
		mov	#0000000000000000b,port(#SPCR1_1)
		mov	#0000001000000000b,port(#SPCR2_1)
		mov	#1Fa0h,port(#RCR1_1)		; 32 32-bit words
		mov	#1,port(#RCR2_1)
		mov	#1Fa0h,port(#XCR1_1)		; 32 32-bit words
		mov	#1,port(#XCR2_1)
		mov	#0117h,port(#SRGR1_1)		; 010b  0117
		mov	#33ffh,port(#SRGR2_1)
		mov	#0,port(#MCR1_1)
		mov	#0,port(#MCR2_1)
;		mov	#0a01h,port(#PCR1)
		mov	#0b00h,port(#PCR1)
		;
		;  sync: element synchronization.
		;  one element is 32-bit word.
		;  one frame contains 128 elements
		;  one block contains two frames.
		;  auto-init enabled (circular buffer)
		;
		;  RX: 
		;     source addres:  fixed, IO space, RCR2, bursting disabled, packing disabled
		;     dest address:   autoincrement, DARAM, bursting enabled, packing disabled
		;
		;  TX: 
		;     source address:   autoincrement, DARAM, bursting enabled, packing disabled
		;     dest addres:      fixed, IO space, XCR2, bursting disabled, packing disabled
		;
		;  Interrupts:
		;    FRAME int : frame received.
		;    BLOCK int : for pointer synchronization.

		; Program DMA ch #0 for BSP TX operation
			;FEDCBA9876543210
		mov	#0001001101000110b, port(#DMA_CCR0)   	; DSTAM=00 SRCAM=01 EP=0 R=0 RPT=1 AI=1
								; EN=0 PRIO=1 FS=0 SYNC=00110 (xevt1)
		mov	#0000000000001000b, port(#DMA_CICR0)	; FRAME_IE & BLOCK_IE
		mov	#0000011100000110b, port(#DMA_CSDP0)	; DSTB=00 DSTP=0 DST=0011 SRCB=10 SRCP=1 
								; SRC=0001 DT=01
		mov	#(DXR2_1 shl 1 ) & 0FFFFh, port(#DMA_CDSA_L0)
		mov	#(DXR2_1 shr 15) & 1     , port(#DMA_CDSA_U0)
		mov	#(bsp_dma_txbuf1 shl 1 ) & 0FFFFh, port(#DMA_CSSA_L0)
		mov	#(bsp_dma_txbuf1 shr 15) & 1     , port(#DMA_CSSA_U0)
		
		mov	#256,port(#DMA_CEN0)			; 256 elements per frame
		mov	#1,port(#DMA_CFN0)			; 1 frames per block
		
		mov	#0,port(#DMA_CEI0)			; clear element index
		mov	#0,port(#DMA_CFI0)			; clear frame index
							
		; Program DMA ch #1 for BSP RX operation
			;FEDCBA9876543210
		mov	#0100001101000101b, port(#DMA_CCR1)   	; DSTAM=01 SRCAM=00 EP=0 R=0 RPT=1 AI=1
								; EN=0 PRIO=1 FS=0 SYNC=00101 (revt1)
		mov	#0000000000001100b, port(#DMA_CICR1)	; FRAME_IE & HALF_FRAME_IE
		mov	#1000001000001110b, port(#DMA_CSDP1)	; DSTB=10 DSTP=1 DST=0001 SRCB=00 SRCP=0 
								; SRC=0011 DT=01
		mov	#(bsp_dma_rxbuf1 shl 1 ) & 0FFFFh, port(#DMA_CDSA_L1)
		mov	#(bsp_dma_rxbuf1 shr 15) & 1     , port(#DMA_CDSA_U1)
		mov	#(DRR2_1 shl 1 ) & 0FFFFh, port(#DMA_CSSA_L1)
		mov	#(DRR2_1 shr 15) & 1     , port(#DMA_CSSA_U1)
		
		mov	#256,port(#DMA_CEN1)			; 256 elements per frame
		mov	#1,port(#DMA_CFN1)			; 1 frames per block
		
		mov	#0,port(#DMA_CEI1)			; clear element index
		mov	#0,port(#DMA_CFI1)			; clear frame index
		rpt	#100
		nop
		
		mov	#0c0h,port(#SPCR2_1)		; enable SR & FSR generators
		rpt	#0FFFFh
		nop
		or	#80h,port(#DMA_CCR0)		; enable DMA TX
		or	#80h,port(#DMA_CCR1)		; enable DMA RX
		mov	#0c1h,port(#SPCR2_1)		; enable transmiter
		mov	#1,port(#SPCR1_1)		; enable receiver
		ret