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Вкратце:
Characteristics of the PCI bus interface unit within the FPGA
- supports PCI-Master and PCI-Slave operation
- 33 MHz / 32Bit – PCI bus support
- complies with PCI-Spezification 2.1 (not officially tested/approved/certified !)
- Independent clock for PCI <- -> Local Bus by means of transmit and receive FIFO buffer
- configurable FIFO buffer size
Additional Features:
- I²C-Bus-Interface
- programmable clock controller for local bus clock
- variable / freely defniable local bus structure and protocol (adaption to various Microcontrollers and full custom chips possible)
E-mail: 
info@telesys.ru
