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Или чтото похожее (+)..
MODULE sreg
TITLE 'controller'
DECLARATIONS
SD0 pin 2;
SCLK pin 4;
SHRG7..SHRG0 node istype 'reg,buffer';
SHRG = [SHRG7..SHRG0];
COMPRT pin 6 istype 'com,buffer';
EQUATIONS
SHRG.d = [SHRG6..SHRG0,SD0];
SHRG.clk= SCLK;
COMPRT =(SHRG.Q == 11011011);
END
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