Отправлено karabas 24 марта 2004 г. 19:03 В ответ на: А есть ли в Xilinxе возможность умножения частоты скажем на 3 или на 5 как в апексе20е? отправлено k_george 23 марта 2004 г. 15:59

"...The DFS component generates clock signals the frequency
of which is a product of the clock frequency at the CLKIN
input and a ratio of two user-determined integers.

The output frequency (fCLKFX) can be expressed as a function
of the incoming clock frequency (fCLKIN) as follows:

fCLKFX = fCLKIN*(CLKFX_MULTIPLY/CLKFX_DIVIDE)

CLKFX_MULTIPLY- Frequency multiplier constant: Integer from 2 to 32
CLKFX_DIVIDE- Frequency divisor constant: Integer from 1 to 32

..."