Отправлено lutik 01 июня 2004 г. 16:30 В ответ на: Ответ: отправлено ОС 01 июня 2004 г. 13:35

данных у меня всего 32-е ячейки так что остальные просто какими то числами инициализирую

library ieee;
use ieee.std_logic_1164.all;
use ieee.STD_LOGIC_SIGNED.all;
use ieee.STD_LOGIC_ARITH.all;
--library work;
-- use work.LibFun.all;

entity BLOCKROM is
generic(
DWIDTH : natural := 10
;AWIDTH : natural := 8

);
port (
CLK : in std_logic
;RES : in std_logic
;ENA : in std_logic
;ADD : in std_logic
;NEG : in std_logic
;TRIG : out std_logic_vector(DWIDTH-1 downto 0)
);
end BLOCKROM;

architecture BLOCKROMARC of BLOCKROM is

type TVOLLEVEL is array (0 to 2**AWIDTH-1) of std_logic_vector(DWIDTH-1 downto 0);
signal VOLLEVEL : TVOLLEVEL;
attribute SYN_ROMSTYLE : string;
attribute SYN_ROMSTYLE of VOLLEVEL : signal is "block_rom";
signal ROMADDR : integer range 0 to 2**AWIDTH-1;

signal REGVOL : std_logic_vector(AWIDTH-1 downto 0);

begin

VOLLEVEL(0) <= CONV_STD_LOGIC_VECTOR(1023,10);
VOLLEVEL(1) <= CONV_STD_LOGIC_VECTOR(825,10); -- VolLevel(1)
VOLLEVEL(2) <= CONV_STD_LOGIC_VECTOR(665,10); -- VolLevel(2)
VOLLEVEL(3) <= CONV_STD_LOGIC_VECTOR(536,10); -- VolLevel(3)
VOLLEVEL(4) <= CONV_STD_LOGIC_VECTOR(432,10); -- VolLevel(4)
VOLLEVEL(5) <= CONV_STD_LOGIC_VECTOR(348,10); -- VolLevel(5)
VOLLEVEL(6) <= CONV_STD_LOGIC_VECTOR(281,10); -- VolLevel(6)
VOLLEVEL(7) <= CONV_STD_LOGIC_VECTOR(226,10); -- VolLevel(7)
VOLLEVEL(8) <= CONV_STD_LOGIC_VECTOR(183,10); -- VolLevel(8)
VOLLEVEL(9) <= CONV_STD_LOGIC_VECTOR(147,10); -- VolLevel(9) ;
VOLLEVEL(10) <= CONV_STD_LOGIC_VECTOR(119,10); -- VolLevel(10)
VOLLEVEL(11) <= CONV_STD_LOGIC_VECTOR(95,10); -- VolLevel(11)
VOLLEVEL(12) <= CONV_STD_LOGIC_VECTOR(77,10); -- VolLevel(12)
VOLLEVEL(13) <= CONV_STD_LOGIC_VECTOR(62,10); -- VolLevel(13)
VOLLEVEL(14) <= CONV_STD_LOGIC_VECTOR(50,10); -- VolLevel(14)
VOLLEVEL(15) <= CONV_STD_LOGIC_VECTOR(40,10); -- VolLevel(15)
VOLLEVEL(16) <= CONV_STD_LOGIC_VECTOR(32,10); -- VolLevel(16)
VOLLEVEL(17) <= CONV_STD_LOGIC_VECTOR(26,10); -- VolLevel(17)
VOLLEVEL(18) <= CONV_STD_LOGIC_VECTOR(23,10); -- VolLevel(18)
VOLLEVEL(19) <= CONV_STD_LOGIC_VECTOR(20,10); -- VolLevel(19)
VOLLEVEL(20) <= CONV_STD_LOGIC_VECTOR(18,10); -- VolLevel(20)
VOLLEVEL(21) <= CONV_STD_LOGIC_VECTOR(16,10); -- VolLevel(21)
VOLLEVEL(22) <= CONV_STD_LOGIC_VECTOR(14,10); -- VolLevel(22)
VOLLEVEL(23) <= CONV_STD_LOGIC_VECTOR(12,10); -- VolLevel(23)
VOLLEVEL(24) <= CONV_STD_LOGIC_VECTOR(10,10); -- VolLevel(24)
VOLLEVEL(25) <= CONV_STD_LOGIC_VECTOR(9,10); -- VolLevel(25)
VOLLEVEL(26) <= CONV_STD_LOGIC_VECTOR(8,10); -- VolLevel(26)
VOLLEVEL(27) <= CONV_STD_LOGIC_VECTOR(6,10); -- VolLevel(27)
VOLLEVEL(28) <= CONV_STD_LOGIC_VECTOR(4,10); -- VolLevel(28)
VOLLEVEL(29) <= CONV_STD_LOGIC_VECTOR(2,10); -- VolLevel(29)
VOLLEVEL(30) <= CONV_STD_LOGIC_VECTOR(1,10); -- VolLevel(30)
VOLLEVEL(31) <= CONV_STD_LOGIC_VECTOR(0,10); -- VolLevel(31)

ROM_DATA:
for I in 32 to 2**AWIDTH-1 generate
VOLLEVEL(I) <= CONV_STD_LOGIC_VECTOR(64,10);
end generate;

ADDRESS_GENERATOR:
process(CLK)begin
if CLK = '1' and CLK'event then
if RES = '1' then
REGVOL <= CONV_STD_LOGIC_VECTOR(18,8);
elsif ENA = '1' then
if ADD = '1' then
if UNSIGNED(REGVOL) > 0 then
REGVOL <= UNSIGNED(REGVOL)-1;
end if;
elsif NEG = '1' then
if UNSIGNED(REGVOL) < 2**AWIDTH-1 then
REGVOL <= UNSIGNED(REGVOL)+1;
end if;
end if;
end if;
end if;
end process;

ROMADDR <= CONV_INTEGER(UNSIGNED(REGVOL));
TRIG <= VOLLEVEL(ROMADDR);


end BLOCKROMARC;