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В Синплифи, например написано такое:
Example: FLEX
module adder_8(cout, sum, a, b, cin);
/* Put the cout output on pin 159. */
output cout /* synthesis altera_chip_pin_lc="@159" */;
output [7: 0] sum
/* synthesis altera_chip_pin_lc="@17,@166,@191,@152,@15,@148,@147,@149" */;
/* Put the "a" input bus from bits 7 through 0 on pins
194, 177, 70, 97, 109, 6, 174, and 204, respectively. */
input [7: 0] a
/* synthesis altera_chip_pin_lc="@194,@177,@70,@97,@109,@6,@174,@204" */;
/* Let Altera place the "b" and "cin" inputs. */
input [7:0] b;
input cin;
assign {cout, sum} = a + b + cin;
endmodule
Example: APEX20K/E/C, Mercury and Excalibur
module alu(out1, opcode, a, b, sel, clk);
output [7:0] out1 /*synthesis altera_chip_pin_lc =
"14,12,11,5,21,18,16,15" */;
input [2:0] opcode;
input [7:0] a,b;
input sel, clk;
reg [7:0] alu_tmp;
reg [7:0] out1;
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