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Ответ: Эт чтоб не вникать. 4х6. И выброси нафиг автомат состояний!!!
(«Телесистемы»: Конференция «Программируемые логические схемы и их применение»)
миниатюрный аудио-видеорекордер mAVR

Отправлено Nikolaj 28 апреля 2005 г. 12:57
В ответ на: Уважаемые Доны, возникла потребность в аппаратном ШИМе отправлено ВинниПух 28 апреля 2005 г. 12:37

INCLUDE "LPM_COUNTER.inc"; --TNN
INCLUDE "LPM_BUSTRI.inc"; --TNN
INCLUDE "LPM_MUX.inc"; --TNN
CONSTANT Duration_OneFaze = 82; --(50000000 Hz /600000 Hz);
SUBDESIGN ComplitPWM
( CLK : INPUT; -- Common signals
FromADC[11..0], Busy : INPUT; -- For ADC service
ConvSt : OUTPUT;
mkCPUbus[7..0] : BIDIR; -- For mkCPU worked
nRD, nWR, ALE : INPUT;
MODE : INPUT; -- Mode selection: "Only_PWM" or "Direct_Digital_Control"
-- PWModulator outputs
F00out, F01out, F02out, F03out, F04out, F05out, F06out, F07out, F08out, F09out, F10out, F11out : OUTPUT;
)
VARIABLE
-- Counter of faza define
-- old F00, F01, F02, F03, F04, F05, F06, F07, F08, F09, F10, F11 : lpm_counter WITH (LPM_WIDTH = 11, LPM_DIRECTION = "DOWN");
F00, F01, F02, F03, F04, F05, F06, F07, F08, F09, F10, F11 : lpm_counter WITH (LPM_WIDTH = 11, LPM_DIRECTION = "UP");
-- Faza Fofmer define
FazaFRMR : MACHINE WITH STATES (ST0, ST1, ST2, ST3, ST4, ST5, ST6, ST7, ST8, ST9, ST10, ST11);
F0SM, F1SM, F2SM, F3SM, F4SM, F5SM, F6SM, F7SM, F8SM, F9SM, F10SM, F11SM : NODE;
FazaClocker : lpm_counter WITH (LPM_WIDTH = 8, LPM_DIRECTION = "DOWN");
-- MUX define
Mux_RefCode : lpm_mux WITH (LPM_WIDTH = 10, LPM_SIZE = 2, LPM_WIDTHS = 1, LPM_PIPELINE = 1);
Mux_mkCPUbus : lpm_mux WITH (LPM_WIDTH = 8, LPM_SIZE = 2, LPM_WIDTHS = 1, LPM_PIPELINE = 1);
-- REGISTER define
FromADC_RG[11..0], FromCPU_RG[9..0], TempFromCPU_RG[1..0] : DFF;
ALE_RG : DFFE;
-- TriBuffer
TriBuffer : lpm_bustri WITH (LPM_WIDTH = 8);
BEGIN -- ################################################################################################################
-- CONTROL LOGIC ENABLE
-- Another variant ConvSt = NOT ( (FazaClocker.q[7] AND (NOT MODE)) OR (MODE AND ADDR AND (NOT nRD)) );
ConvSt = NOT ( (FazaClocker.q[7] AND (NOT MODE)) OR (MODE AND ALE_RG.q AND (NOT nRD)) );
-- ALL REGISTER connection
FromADC_RG[11..0].d = FromADC[11..0]; -- ADC Convertion Data story
FromADC_RG[].clk = NOT Busy;

-- old ALE_RG.clk = NOT ALE; ALE_RG.d = mkCPUbus[0]; -- Address Latch into REG
ALE_RG.clk = CLK; ALE_RG.ena = ALE;
ALE_RG.d = mkCPUbus[0]; -- Address Latch into REG
TempFromCPU_RG[1..0].d = mkCPUbus[1..0]; -- Story Data from mkCPU (M byte to TempREG)
TempFromCPU_RG[].clk = (nWR OR ALE_RG.q);

FromCPU_RG[9..8].d = TempFromCPU_RG[1..0].q; -- Story Data from mkCPU (All Data)
FromCPU_RG[7..0].d = mkCPUbus[7..0];
FromCPU_RG[].clk = (nWR OR (NOT ALE_RG.q));
-- Multiplexers connection
(Mux_RefCode, Mux_mkCPUbus).clock = CLK;
Mux_RefCode.sel[0] = MODE; -- Reference Code multiplexer
Mux_RefCode.data[0][] = FromADC_RG[11..2].q; Mux_RefCode.data[1][] = FromCPU_RG[].q;

Mux_mkCPUbus.sel[0] = ALE_RG.q; -- mkCPU_Bus multiplexer
Mux_mkCPUbus.data[1][3..0] = FromADC_RG[11..8].q; Mux_mkCPUbus.data[1][7..4] = GND;
Mux_mkCPUbus.data[0][] = FromADC_RG[7..0].q;

TriBuffer.data[] = Mux_mkCPUbus.result[];
mkCPUbus[] = TriBuffer.tridata[];
TriBuffer.enabledt = NOT nRD;
-- Faza former (lpm_counter version) =======================================================================================
FazaClocker.clock = CLK; FazaClocker.data[] = Duration_OneFaze; FazaClocker.sload = FazaClocker.q[7]; -- Counter connection
FazaFRMR.clk = FazaClocker.q[7]; -- clocked FazaFRMR_state_machine from FazaClocker_counter_output.
TABLE
FazaFRMR => FazaFRMR, F0SM, F1SM, F2SM, F3SM, F4SM, F5SM, F6SM, F7SM, F8SM, F9SM, F10SM, F11SM;
ST0 => ST1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0;
ST1 => ST2, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0;
ST2 => ST3, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0;
ST3 => ST4, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0;
ST4 => ST5, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0;
ST5 => ST6, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0;
ST6 => ST7, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0;
ST7 => ST8, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0;
ST8 => ST9, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0;
ST9 => ST10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0;
ST10 => ST11, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0;
ST11 => ST0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1;
END TABLE;
-- PWM COUNTERS CONNECTION ===================================================================================================
(F00, F01, F02, F03, F04, F05, F06, F07, F08, F09, F10, F11).clock = CLK; -- CLOCK CONNECT
(F00, F01, F02, F03, F04, F05, F06, F07, F08, F09, F10, F11).data[9..0] = Mux_RefCode.result[]; -- INPUT DATA CONNECTED
(F00, F01, F02, F03, F04, F05, F06, F07, F08, F09, F10, F11).data[10] = VCC; -- MSB - set in "1"
-- LOAD DATA CONNECTION
F00.sload = (F0SM AND FazaClocker.q[7]); F01.sload = (F1SM AND FazaClocker.q[7]); F02.sload = (F2SM AND FazaClocker.q[7]);
F03.sload = (F3SM AND FazaClocker.q[7]); F04.sload = (F4SM AND FazaClocker.q[7]); F05.sload = (F5SM AND FazaClocker.q[7]);
F06.sload = (F6SM AND FazaClocker.q[7]); F07.sload = (F7SM AND FazaClocker.q[7]); F08.sload = (F8SM AND FazaClocker.q[7]);
F09.sload = (F9SM AND FazaClocker.q[7]); F10.sload = (F10SM AND FazaClocker.q[7]); F11.sload = (F11SM AND FazaClocker.q[7]);
-- OUTPUT DEFINE (CONNECTION)
F00out = F00.q[10]; F01out = F01.q[10]; F02out = F02.q[10]; F03out = F03.q[10]; F04out = F04.q[10]; F05out = F05.q[10];
F06out = F06.q[10]; F07out = F07.q[10]; F08out = F08.q[10]; F09out = F09.q[10]; F10out = F10.q[10]; F11out = F11.q[10];
-- END OF PWM COUNTERS CONNECTION
END;

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