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ShiftRegister: process (Reset, Clk)
begin
if Reset = '1' then
Register <= (others => '0');
elsif rising_edge(Clk) then
if LoadEnable = '1' then
Register <= InputByte;
elsif ShiftEnable = '1' then
Register <= Register("MSB-1" downto 0) & '0';
end if
end if;
end process ShiftRegister;
Output <= Register("MSB");
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