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У Xilinx-а есть такой документ: XAPP058 June 1999 (Version 2.0) 1-1
там все написано... Где-то есть у них ссылка на примеры, там и найдете
Удачи
Summary
The Xilinx high performance CPLD and FPGA families provide in-system programmability, reliable pin locking, and JTAG
boundary-scan test capability. This powerful combination of features allows designers to make significant changes and yet
keep the original device pinouts, eliminating the need to re-tool PC boards. By using an embedded controller to program
these CPLDs and FPGAs from an on-board RAM or EPROM, designers can easily upgrade, modify, and test designs, even
in the field.
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