/*****************************************************
This program was produced by the
CodeWizardAVR V1.25.9 Standard
Automatic Program Generator
© Copyright 1998-2008 Pavel Haiduc, HP InfoTech s.r.l.
http://www.hpinfotech.com

Project :
Version :
Date : 19.05.2008
Author : F4CG
Company : F4CG
Comments:


Chip type : ATmega3250
Program type : Application
Clock frequency : 8,000000 MHz
Memory model : Small
External SRAM size : 0
Data Stack size : 512
*****************************************************/

#include <mega3250.h>

// Declare your global variables here

void main(void)
{
// Declare your local variables here

// Input/Output Ports initialization
// Port A initialization
// Func7=In Func6=In Func5=In Func4=In Func3=In Func2=In Func1=In Func0=In
// State7=T State6=T State5=T State4=T State3=T State2=T State1=T State0=T
PORTA=0x00;
DDRA=0x00;

// Port B initialization
// Func7=In Func6=In Func5=In Func4=In Func3=In Func2=In Func1=In Func0=In
// State7=T State6=T State5=T State4=T State3=T State2=T State1=T State0=T
PORTB=0x00;
DDRB=0x00;

// Port C initialization
// Func7=In Func6=In Func5=In Func4=In Func3=In Func2=In Func1=In Func0=In
// State7=T State6=T State5=T State4=T State3=T State2=T State1=T State0=T
PORTC=0x00;
DDRC=0x00;

// Port D initialization
// Func7=In Func6=In Func5=In Func4=In Func3=In Func2=In Func1=In Func0=In
// State7=T State6=T State5=T State4=T State3=T State2=T State1=T State0=T
PORTD=0x00;
DDRD=0x00;

// Port E initialization
// Func7=In Func6=In Func5=In Func4=In Func3=In Func2=In Func1=In Func0=In
// State7=T State6=T State5=T State4=T State3=T State2=T State1=T State0=T
PORTE=0x00;
DDRE=0x00;

// Port F initialization
// Func7=In Func6=In Func5=In Func4=In Func3=In Func2=In Func1=In Func0=In
// State7=T State6=T State5=T State4=T State3=T State2=T State1=T State0=T
PORTF=0x00;
DDRF=0x00;

// Port G initialization
// Func4=In Func3=In Func2=In Func1=In Func0=In
// State4=T State3=T State2=T State1=T State0=T
PORTG=0x00;
DDRG=0x00;

// Port H initialization
// Func7=In Func6=In Func5=In Func4=In Func3=In Func2=In Func1=In Func0=In
// State7=T State6=T State5=T State4=T State3=T State2=T State1=T State0=T
PORTH=0x00;
DDRH=0x00;

// Port J initialization
// Func6=In Func5=In Func4=In Func3=In Func2=In Func1=In Func0=In
// State6=T State5=T State4=T State3=T State2=T State1=T State0=T
PORTJ=0x00;
DDRJ=0x00;

// Timer/Counter 0 initialization
// Clock source: System Clock
// Clock value: Timer 0 Stopped
// Mode: Normal top=FFh
// OC0 output: Disconnected
TCCR0A=0x00;
TCNT0=0x00;
OCR0A=0x00;

// Timer/Counter 1 initialization
// Clock source: System Clock
// Clock value: Timer 1 Stopped
// Mode: Normal top=FFFFh
// OC1A output: Discon.
// OC1B output: Discon.
// Noise Canceler: Off
// Input Capture on Falling Edge
// Timer 1 Overflow Interrupt: Off
// Input Capture Interrupt: Off
// Compare A Match Interrupt: Off
// Compare B Match Interrupt: Off
TCCR1A=0x00;
TCCR1B=0x00;
TCNT1H=0x00;
TCNT1L=0x00;
ICR1H=0x00;
ICR1L=0x00;
OCR1AH=0x00;
OCR1AL=0x00;
OCR1BH=0x00;
OCR1BL=0x00;

// Timer/Counter 2 initialization
// Clock source: System Clock
// Clock value: Timer 2 Stopped
// Mode: Normal top=FFh
// OC2 output: Disconnected
ASSR=0x00;
TCCR2A=0x00;
TCNT2=0x00;
OCR2A=0x00;

// External Interrupt(s) initialization
// INT0: Off
// Interrupt on any change on pins PCINT0-7: Off
// Interrupt on any change on pins PCINT8-15: Off
// Interrupt on any change on pins PCINT16-23: Off
// Interrupt on any change on pins PCINT24-30: Off
EICRA=0x00;
EIMSK=0x00;

// Timer/Counter 0 Interrupt(s) initialization
TIMSK0=0x00;
// Timer/Counter 1 Interrupt(s) initialization
TIMSK1=0x00;
// Timer/Counter 2 Interrupt(s) initialization
TIMSK2=0x00;

// Universal Serial Interface initialization
// Mode: Disabled
// Clock source: Register & Counter=no clk.
// USI Counter Overflow Interrupt: Off
USICR=0x00;

// Analog Comparator initialization
// Analog Comparator: Off
// Analog Comparator Input Capture by Timer/Counter 1: Off
ACSR=0x80;
ADCSRB=0x00;

while (1){
if (PINE.0==1){PINF.0=1;} else {PINF.0=0;};//VSU PEREMENNOE
if (PINE.1==1){PINF.1=1;} else {PINF.1=0;};//VSU PEREMENNOE
if (PINE.2==1){PINF.2=1;} else {PINF.2=0;};//VSU PEREMENNOE
if (PINE.3==1){PINF.3=1;} else {PINF.3=0;};//VSU PEREMENNOE

if (PINA.0==1){PINB.0=0;} else {PINB.0=1;};//VSU POSTOYANNOE
if (PINA.1==1){PINB.1=0;} else {PINB.1=1;};//VSU POSTOYANNOE
if (PINA.2==1){PINB.2=0;} else {PINB.2=1;};//VSU POSTOYANNOE
if (PINA.3==1){PINB.3=0;} else {PINB.3=1;};//VSU POSTOYANNOE
if (PINA.4==1){PINB.4=0;} else {PINB.4=1;};//VSU POSTOYANNOE
if (PINA.5==1){PINB.5=0;} else {PINB.5=1;};//VSU POSTOYANNOE
if (PINA.6==1){PINB.6=0;} else {PINB.6=1;};//VSU POSTOYANNOE
if (PINA.7==1){PINB.7=0;} else {PINB.7=1;};//VSU POSTOYANNOE

if (PINC.0==1){PIND.0=0;} else {PIND.0=1;};//VSU POSTOYANNOE
if (PINC.1==1){PIND.1=0;} else {PIND.1=1;};//VSU POSTOYANNOE
if (PINC.2==1){PIND.2=0;} else {PIND.2=1;};//VSU POSTOYANNOE
if (PINC.3==1){PIND.3=0;} else {PIND.3=1;};//VSU POSTOYANNOE
if (PINC.4==1){PIND.4=0;} else {PIND.4=1;};//VSU POSTOYANNOE
if (PINC.5==1){PIND.5=0;} else {PIND.5=1;};//VSU POSTOYANNOE
if (PINC.6==1){PIND.6=0;} else {PIND.6=1;};//VSU POSTOYANNOE
if (PINC.7==1){PIND.7=0;} else {PIND.7=1;};//VSU POSTOYANNOE

if (PINE.4==1){PINF.4=0;} else {PINF.4=1;};//VSU POSTOYANNOE
if (PINE.5==1){PINF.5=0;} else {PINF.5=1;};//VSU POSTOYANNOE
if (PINE.6==1){PINF.6=0;} else {PINF.6=1;};//VSU POSTOYANNOE
if (PINE.7==1){PINF.7=0;} else {PINF.7=1;};//VSU POSTOYANNOE

if (PING.0==1){PING.1=0;} else {PING.1=1;};//VSU POSTOYANNOE
if (PING.2==1){PING.3=0;} else {PING.3=1;};//VSU POSTOYANNOE
if (PING.4==1){PING.5=0;} else {PING.5=1;};//VSU POSTOYANNOE
if (PING.6==1){PING.7=0;} else {PING.7=1;};//VSU POSTOYANNOE
if (PORTH.0==0) {PORTH.1=0;} else {PORTH.1=0;};//VSU POSTOYANNOE
if (PORTJ.0==1) {PORTJ.1=0;} else {PORTJ.1=1;};//VSU POSTOYANNOE
};
}