# Model Technology ModelSim SE vlog 6.3f Compiler 2008.02 Feb 28 2008 # -- Compiling module altpcietb_bfm_driver # ** Error: altpcietb_bfm_configure.v(1547): A begin/end block was found with an empty body. This is permitted in SystemVerilog, but not permitted in Verilog. Please look for any stray semicolons. # ** Error: C:/Modeltech_6.3f/win32/vlog failed. # Error in macro ./runtb.do line 32 # C:/Modeltech_6.3f/win32/vlog failed. # while executing # "vlog -work work $vfile" # ("while" body line 2) # invoked from within # "while {[gets $simlist vfile] >= 0} { # vlog -work work $vfile # }" # quit