[an error occurred while processing this directive]
|
New features in version 10.2:
MAX+PLUS II EDIF, VHDL, and Verilog HDL I/O support is compatible with the following EDA vendor releases:
Synthesis Tools:
- Aplus Design Technologies (ADT) PALACE 2.1
- Mentor Graphics LeonardoSpectrum-Altera Version 2002c
- Synopsys Design Compiler 2001.8
- Synopsys FPGA Compiler II 3.7
- Synopsys FPGA Compiler II Altera Edition 3.7
- Synopsys FPGA Express 3.51
- Synplicity Synplify and Synplify Pro 7.2
E-mail: info@telesys.ru