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А вот и оно (+)
(«Телесистемы»: Конференция «Программируемые логические схемы и их применение»)

миниатюрный аудио-видеорекордер mAVR

Отправлено SM 10 января 2003 г. 14:01
В ответ на: А можно посмотреть на видоизмененную LPM_ADD_SUB? Если это не коммерческая тайна конечно. отправлено Olxx 09 января 2003 г. 21:00


//
//
// ********** Module a_unit51_lpm_add_sub7 **********
//
// Referenced from module: a_unit51
// by instances:
//
// u0
//
//
// Passed in Parameter Values:
//
// MAXIMIZE_SPEED = 10
// LPM_REPRESENTATION = SIGNED
// LPM_WIDTH = 8
//
//
// Unconnected Ports:
//
// clken aclr clock
//
//

module a_unit51_lpm_add_sub7(dataa, datab, cin, add_sub, result, cout,
overflow);
input [7:0] dataa;
input [7:0] datab;
input cin, add_sub;
output [7:0] result;
output cout, overflow;

wire [7:0] datab_node;
wire [7:0] datab_node_in;
wire [7:0] datab_node_out;
wire cin_node;
wire [7:0] adder0_dataa;
wire [7:0] adder0_datab;
wire adder0_cin;
wire [7:0] adder0_result;
wire adder0_cout, adder0_bg_out, adder0_bp_out;
wire [0:0] look_aheader_bg_in;
wire [0:0] look_aheader_bp_in;
wire look_aheader_cin;
wire [0:0] look_aheader_cout;
wire [7:0] result_node;
wire cout_node;
wire [7:0] result_ext_latency_ffs_data;
wire [7:0] result_ext_latency_ffs_result;
wire [0:0] carry_ext_latency_ffs_data;
wire [0:0] carry_ext_latency_ffs_result;
wire [0:0] oflow_ext_latency_ffs_data;
wire [0:0] oflow_ext_latency_ffs_result;


// Sub Module Section
a_unit51_lpm_add_sub7_addcore8 adder0 (.dataa(adder0_dataa),
.datab(adder0_datab), .cin(adder0_cin), .result(adder0_result),
.cout(adder0_cout), .bg_out(adder0_bg_out), .bp_out(adder0_bp_out));

a_unit51_lpm_add_sub7_look_add9 look_aheader (.bg_in(look_aheader_bg_in),
.bp_in(look_aheader_bp_in), .cin(look_aheader_cin),
.cout(look_aheader_cout));

a_unit51_lpm_add_sub7_altshift10 result_ext_latency_ffs
(.data(result_ext_latency_ffs_data),
.result(result_ext_latency_ffs_result));

a_unit51_lpm_add_sub7_altshift11 carry_ext_latency_ffs
(.data(carry_ext_latency_ffs_data),
.result(carry_ext_latency_ffs_result));

a_unit51_lpm_add_sub7_altshift11 oflow_ext_latency_ffs
(.data(oflow_ext_latency_ffs_data),
.result(oflow_ext_latency_ffs_result));


// Start of original equations
assign datab_node_out = datab_node_in;
assign datab_node_in = datab ^ {8{!add_sub}};
assign cin_node = cin;
assign adder0_dataa = dataa;
assign adder0_datab = datab_node_out;
assign adder0_cin = look_aheader_cout[0];
assign result_node = adder0_result;
assign look_aheader_cin = cin_node;
assign look_aheader_bg_in[0] = adder0_bg_out;
assign look_aheader_bp_in[0] = adder0_bp_out;
assign cout_node = adder0_cout;
assign oflow_ext_latency_ffs_data[0] = (!(dataa[7] ^ datab[7] ^ (!add_sub)))
& (dataa[7] ^ result_node[7]);
assign result_ext_latency_ffs_data = result_node;
assign result = result_ext_latency_ffs_result;
assign carry_ext_latency_ffs_data[0] = cout_node;
assign cout = carry_ext_latency_ffs_result;
assign overflow = oflow_ext_latency_ffs_result;
endmodule

//
//
// ********** Module a_unit51_lpm_add_sub7_addcore8 **********
//
// Referenced from module: a_unit51_lpm_add_sub7
// by instances:
//
// adder0
//
//
// Passed in Parameter Values:
//
// LPM_WIDTH = 8
// LPM_REPRESENTATION = SIGNED
// MAXIMIZE_SPEED = 10
// LPM_DIRECTION = DEFAULT
// ONE_INPUT_IS_CONSTANT = NO
// LPM_PIPELINE = 0
// OPTIMIZE_FOR_SPEED = 5
// CARRY_CHAIN = IGNORE
// CARRY_CHAIN_LENGTH = 32
// DEVICE_FAMILY = MAX7000B
// CONSTANT_CIN = 0
// WIDTH = 8
//
//
// Unconnected Ports:
//
// None
//
//

module a_unit51_lpm_add_sub7_addcore8(dataa, datab, cin, result, cout, bg_out,
bp_out);
input [7:0] dataa;
input [7:0] datab;
input cin;
output [7:0] result;
output cout, bg_out, bp_out;

wire [7:0] gn;
wire [7:1] gs;
wire [7:1] gs_in;
wire [7:1] gs_out;
wire [7:0] pp;
wire [7:0] ps;
wire [7:0] ps_in;
wire [7:0] ps_out;
wire [7:0] psi;
wire [6:0] pc;
wire [2:0] gc;
wire [2:0] g2c;
wire [2:0] p2c;
wire g3, g4, g4_in, g4_out;
wire [2:1] g2cp;
wire [2:1] g2cp_in;
wire [2:1] g2cp_out;
wire [2:2] gcp;
wire [2:2] gcp_in;
wire [2:2] gcp_out;
wire cin_node;
wire [6:0] tot_cin_node;
wire [7:0] result_node;
wire [7:0] result_node_in;
wire [7:0] result_node_out;
wire cout_node, cout_node_in, cout_node_out;
wire [3:0] prop_node;
wire [3:0] prop_node_in;
wire [3:0] prop_node_out;
wire [3:0] genr_node;
wire [3:0] genr_node_in;
wire [3:0] genr_node_out;
wire gp0, gc0_1, gc0_2;


// Start of original equations
assign gs_out = gs_in;
assign ps_out = ps_in;
assign g4_out = g4_in;
assign g2cp_out = g2cp_in;
assign gcp_out[2] = gcp_in;
assign result_node_out = result_node_in;
assign cout_node_out = cout_node_in;
assign prop_node_out = prop_node_in;
assign genr_node_out = genr_node_in;
assign cin_node = cin;
assign prop_node_in[0] = (dataa[1] | datab[1]) & (dataa[0] | datab[0]);
assign genr_node_in[0] = (dataa[1] & datab[1]) | ((dataa[1] | datab[1]) &
dataa[0] & datab[0]);
assign prop_node_in[1] = (dataa[3] | datab[3]) & (dataa[2] | datab[2]);
assign genr_node_in[1] = (dataa[3] & datab[3]) | ((dataa[3] | datab[3]) &
dataa[2] & datab[2]);
assign prop_node_in[2] = (dataa[5] | datab[5]) & (dataa[4] | datab[4]);
assign genr_node_in[2] = (dataa[5] & datab[5]) | ((dataa[5] | datab[5]) &
dataa[4] & datab[4]);
assign prop_node_in[3] = (dataa[7] | datab[7]) & (dataa[6] | datab[6]);
assign genr_node_in[3] = (dataa[7] & datab[7]) | ((dataa[7] | datab[7]) &
dataa[6] & datab[6]);
assign gp0 = prop_node_out[2] & (genr_node_out[1] | (prop_node_out[1] &
genr_node_out[0]));
assign bg_out = genr_node_out[3] | (prop_node_out[3] & (genr_node_out[2] |
gp0));
assign bp_out = prop_node_out[0] & prop_node_out[1] & prop_node_out[2] &
prop_node_out[3];
assign pp[0] = !(dataa[0] | datab[0]);
assign ps_in[0] = pp[0];
assign psi[0] = !ps_out[0];
assign gn[0] = dataa[0] & datab[0];
assign gc0_1 = gn[0];
assign pp[1] = !(dataa[1] | datab[1]);
assign ps_in[1] = pp[1];
assign psi[1] = !ps_out[1];
assign gn[1] = dataa[1] & datab[1];
assign gs_in[1] = gn[1];
assign pp[2] = !(dataa[2] | datab[2]);
assign ps_in[2] = pp[2];
assign psi[2] = !ps_out[2];
assign gn[2] = dataa[2] & datab[2];
assign gs_in[2] = gn[2];
assign pp[3] = !(dataa[3] | datab[3]);
assign ps_in[3] = pp[3];
assign psi[3] = !ps_out[3];
assign gn[3] = dataa[3] & datab[3];
assign gs_in[3] = gn[3];
assign pp[4] = !(dataa[4] | datab[4]);
assign ps_in[4] = pp[4];
assign psi[4] = !ps_out[4];
assign gn[4] = dataa[4] & datab[4];
assign gs_in[4] = gn[4];
assign pp[5] = !(dataa[5] | datab[5]);
assign ps_in[5] = pp[5];
assign psi[5] = !ps_out[5];
assign gn[5] = dataa[5] & datab[5];
assign gs_in[5] = gn[5];
assign pp[6] = !(dataa[6] | datab[6]);
assign ps_in[6] = pp[6];
assign psi[6] = !ps_out[6];
assign gn[6] = dataa[6] & datab[6];
assign gs_in[6] = gn[6];
assign pp[7] = !(dataa[7] | datab[7]);
assign ps_in[7] = pp[7];
assign psi[7] = !ps_out[7];
assign gn[7] = dataa[7] & datab[7];
assign gs_in[7] = gn[7];
assign pc[0] = psi[0] & cin_node;
assign pc[1] = psi[1] & pc[0];
assign pc[2] = psi[2] & pc[1];
assign pc[3] = psi[3] & pc[2];
assign pc[4] = psi[4] & pc[3];
assign pc[5] = psi[5] & pc[4];
assign pc[6] = psi[6] & pc[5];
assign g3 = psi[3] & (!gs_out[3]);
assign g4_in = gn[3] ^ (gc[2] & g3);
assign p2c[0] = g4_out & psi[4];
assign p2c[1] = p2c[0] & psi[5];
assign p2c[2] = p2c[1] & psi[6];
assign gc0_2 = gn[0];
assign gc[1] = gn[1] | (psi[1] & gc[0]);
assign gc[2] = gn[2] | (psi[2] & gc[1]);
assign gcp_in[2] = gc[2];
assign g2c[0] = gn[4];
assign g2c[1] = gn[5] | (psi[5] & g2c[0]);
assign g2c[2] = gn[6] | (psi[6] & g2c[1]);
assign g2cp_in[1] = g2c[1];
assign g2cp_in[2] = g2c[2];
assign tot_cin_node[0] = gc[0] | pc[0];
assign tot_cin_node[1] = gc[1] | pc[1];
assign tot_cin_node[2] = gcp_out[2] | pc[2];
assign tot_cin_node[3] = g4_out | pc[3];
assign tot_cin_node[4] = g2c[0] | pc[4] | p2c[0];
assign tot_cin_node[5] = g2cp_out[1] | pc[5] | p2c[1];
assign tot_cin_node[6] = g2cp_out[2] | pc[6] | p2c[2];
assign result_node_in[0] = (pp[0] | gn[0]) ~^ cin_node;
assign result_node_in[1] = (psi[1] & (!gs_out[1])) ^ tot_cin_node[0];
assign result_node_in[2] = (psi[2] & (!gs_out[2])) ^ tot_cin_node[1];
assign result_node_in[3] = g3 ^ tot_cin_node[2];
assign result_node_in[4] = (psi[4] & (!gs_out[4])) ^ tot_cin_node[3];
assign result_node_in[5] = (psi[5] & (!gs_out[5])) ^ tot_cin_node[4];
assign result_node_in[6] = (psi[6] & (!gs_out[6])) ^ tot_cin_node[5];
assign result_node_in[7] = (psi[7] & (!gs_out[7])) ^ tot_cin_node[6];
assign cout_node_in = gn[7] ^ (psi[7] & (!gs_out[7]) & tot_cin_node[6]);
assign result = result_node_out;
assign cout = cout_node_out;


// Assignments added to explicitly combine the
// effects of multiple drivers in the source
assign gc[0] = gc0_1 | gc0_2;
endmodule

//
//
// ********** Module a_unit51_lpm_add_sub7_look_add9 **********
//
// Referenced from module: a_unit51_lpm_add_sub7
// by instances:
//
// look_aheader
//
//
// Passed in Parameter Values:
//
// LPM_WIDTH = 8
// LPM_REPRESENTATION = SIGNED
// MAXIMIZE_SPEED = 10
// LPM_DIRECTION = DEFAULT
// ONE_INPUT_IS_CONSTANT = NO
// LPM_PIPELINE = 0
// OPTIMIZE_FOR_SPEED = 5
// CARRY_CHAIN = IGNORE
// CARRY_CHAIN_LENGTH = 32
// DEVICE_FAMILY = MAX7000B
// WIDTH = 1
//
//
// Unconnected Ports:
//
// bp_out bg_out
//
//

module a_unit51_lpm_add_sub7_look_add9(bg_in, bp_in, cin, cout, bg_out,
bp_out);
input [0:0] bg_in;
input [0:0] bp_in;
input cin;
output [0:0] cout;
output bg_out, bp_out;

// Start of original equations
assign cout[0] = cin;
assign bg_out = bg_in[0];
assign bp_out = bp_in[0];
endmodule

//
//
// ********** Module a_unit51_lpm_add_sub7_altshift10 **********
//
// Referenced from module: a_unit51_lpm_add_sub7
// by instances:
//
// result_ext_latency_ffs
//
//
// Passed in Parameter Values:
//
// LPM_WIDTH = 8
// LPM_REPRESENTATION = SIGNED
// MAXIMIZE_SPEED = 10
// LPM_DIRECTION = DEFAULT
// ONE_INPUT_IS_CONSTANT = NO
// LPM_PIPELINE = 0
// OPTIMIZE_FOR_SPEED = 5
// CARRY_CHAIN = IGNORE
// CARRY_CHAIN_LENGTH = 32
// DEVICE_FAMILY = MAX7000B
// DEPTH = 0
// WIDTH = 8
//
//
// Unconnected Ports:
//
// clken aclr clock
//
//

module a_unit51_lpm_add_sub7_altshift10(data, result);
input [7:0] data;
output [7:0] result;

// Start of original equations
assign result = data;
endmodule

//
//
// ********** Module a_unit51_lpm_add_sub7_altshift11 **********
//
// Referenced from module: a_unit51_lpm_add_sub7
// by instances:
//
// oflow_ext_latency_ffs carry_ext_latency_ffs
//
//
// Passed in Parameter Values:
//
// LPM_WIDTH = 8
// LPM_REPRESENTATION = SIGNED
// MAXIMIZE_SPEED = 10
// LPM_DIRECTION = DEFAULT
// ONE_INPUT_IS_CONSTANT = NO
// LPM_PIPELINE = 0
// OPTIMIZE_FOR_SPEED = 5
// CARRY_CHAIN = IGNORE
// CARRY_CHAIN_LENGTH = 32
// DEVICE_FAMILY = MAX7000B
// DEPTH = 0
// WIDTH = 1
//
//
// Unconnected Ports:
//
// clken aclr clock
//
//

module a_unit51_lpm_add_sub7_altshift11(data, result);
input [0:0] data;
output [0:0] result;

// Start of original equations
assign result[0] = data;
endmodule


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