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library exemplar;
use exemplar.exemplar_1164.all;
library ieee;
use ieee.std_logic_1164.all;
entity s111 is
port(
addr : in std_logic_vector(4 downto 0);-- alarms activity signals
cs : out std_logic_vector(18 downto 0));-- cfg RGs chip select one hot coding ('1' active)
end s111;
architecture dtf of s111 is
begin
with evec2int(addr) select--
cs<="0001010101110000010" when 1,--
"1111100000000100101" when 2,--
"0001100001100001001" when 3,--
"1000000011111110001" when 4,--
"0000000000000100000" when 5,--
"0111110000000000001" when 6,--
"0000000111001000000" when 7,--
"0000000000011111110" when 8,--
"0001111111100000000" when 9,--
"0000000001000000001" when 10,--
"0011001110000110010" when 11,--
"1111000100000001111" when 12,--
"0000001111110000000" when 13,--
"0001110011100110001" when 14,--
"0000100001100101010" when 15,--
"1101011010101011101" when 16,--
"0010000110110111110" when 17,--
"0111111111111111001" when 18,--
"1000001110000000000" when 19,--
"0000000001111110011" when others;
end dtf;
***********************************************
Device Utilization for 9536CS48
***********************************************
Resource Used Avail Utilization
-----------------------------------------------
IOs 24 48 50.00%
Gates 143 800 17.88%
Flip Flops 0 48 0.00%
-----------------------------------------------
XACT: version C.22 Xilinx Inc.
Fitter Report
Design Name: s111
Fitting Status: Successful Date: 3- 4-2003, 10:43AM
**************************** Resource Summary ****************************
Design Device Macrocells Product Terms Pins
Name Used Used Used Used
s111 XC9536-5-CS48 19 /36 ( 52%) 91 /180 ( 50%) 24 /34 ( 70%)
PIN RESOURCES:
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