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problema v tom, chto processor zagrujaet FPGA cherez standartnii interfeis, dostatochno
podkluchit'sia k nojkam DATA, DCLK, nCONF, nST, DONE chtobi skopirovat' ves' algoritm. V etom smisle sistema s processorom i
FLASH nichem ne otlichaetsia ot EPC2.
Ia imel vvidu vot chto - zamenit' FLASH na SRAM + batareika,
otkluchit' batareiku ot SRAM esli ,naprimer, otkrili krshku korpusa.
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