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Errata Sheet:
7. Reset During EEPROM Write
If reset is activated during EEPROM write the result is not what should be expected. The EEPROM write cycle completes as normal, but the address registers are reset to 0. The result is that both the address written and address 0 in the EEPROM can be corrupted.
Problem Fix/Workaround Avoid using address 0 for storage, unless you can guarantee that you will not get a reset during EEPROM write.
Rev. 1436A–6/99
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