Отправлено Sinelogic 18 сентября 2005 г. 21:42 В ответ на: ATMEGA - 16 разрядный таймер - нужно ли запрещать счет на время очистки таймера ? отправлено <font color=gray>Vladimir Ljaschko</font> 18 сентября 2005 г. 21:28

The 16-bit timer has a single 8-bit register for temporary storing of the
High byte of the 16-bit access. The same temporary register is shared between all 16-bit
registers within the 16-bit timer. Accessing the Low byte triggers the 16-bit read or write
operation. When the Low byte of a 16-bit register is written by the CPU, the High byte
stored in the temporary register, and the Low byte written are both copied into the 16-bit
register in the same clock cycle. When the Low byte of a 16-bit register is read by the
CPU, the High byte of the 16-bit register is copied into the temporary register in the
same clock cycle as the Low byte is read.

• Thanks. Hard to find. — Vladimir Ljaschko   (18.09.2005 21:55 80.134.159.243, пустое)
  • Скорее - Failed to read :) — =AVR=   (19.09.2005 00:53 80.92.96.19, пустое)
    • It was not time for reading at all :-( — Vladimir Ljaschko   (19.09.2005 13:00 80.134.176.182, пустое)