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#define SPI_DLYBCT 24
#define SPI_DLYBS 16
#define SPI_SCBR 8
#define SPI_DLYBCS 24
void SPI_Init(void)
{AT91PS_SPI SPI_P = AT91C_BASE_SPI;
// AT91PS_PIO PIO_P = AT91C_BASE_PIOA;
// First, enable the clock of the SPI
AT91F_PMC_EnablePeriphClock ( AT91C_BASE_PMC, 1 << AT91C_ID_SPI ) ;
// Configure PIO controllers to periph mode
AT91F_PIO_CfgPeriph( AT91C_BASE_PIOA,
((unsigned int) AT91C_PA13_MOSI ) |
((unsigned int) AT91C_PA12_MISO ) |
((unsigned int) AT91C_PA14_SPCK ) |
((unsigned int) AT91C_PA11_NPCS0 ) , // Peripheral A
0); // Peripheral B
//Reset SPI
AT91F_SPI_Reset(AT91C_BASE_SPI);
//Config SPI (ModeRegister), as MASTER(MSTR=1), Fixed Peripheral Select(PS=0),
//(PCSDEC=0), SPIClock=MCK (FDIV=0), (MODFDIS=1), LoopBackTest, (LLB=1),
//(DLYBCS=14)-( необходимо минимум 14)
AT91F_SPI_CfgMode(SPI_P, AT91C_SPI_MSTR | //AT91C_SPI_PS_FIXED |
AT91C_SPI_MODFDIS //| AT91C_SPI_LLB |
// (0x0E << SPI_DLYBCS)
);
//PCS = NPCS0
AT91F_SPI_CfgPCS(SPI_P,0);
//Config chip select register 0, (CPOL=1, NCPHA=0 (SPI Mode 3)),
// //CSAAT: Chip Select Active After Transfer | AT91C_SPI_CSAAT
AT91F_SPI_CfgCs(SPI_P, 0, AT91C_SPI_BITS_8 | AT91C_SPI_NCPHA | //AT91C_SPI_CSAAT |
(0x03 << SPI_SCBR) | // CLK 16Mhz = MCK48/3
(0x1F << SPI_DLYBS)|
(0x1F << SPI_DLYBCT));
AT91F_SPI_CfgCs(SPI_P, 1,0);
AT91F_SPI_CfgCs(SPI_P, 2,0);
AT91F_SPI_CfgCs(SPI_P, 3,0);
//*enable the SPI - NPCS0
AT91F_SPI_Enable(SPI_P);
//*Configure the CS line
}
unsigned char SPI_TXRX(unsigned int data)
{
unsigned char temp;
AT91PS_SPI SPI_P = AT91C_BASE_SPI;
SPI_P->SPI_TDR = data; // send data
while(!(SPI_P->SPI_SR & 1));
temp = SPI_P->SPI_RDR & 0xff;
return temp;
}
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