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Отправлено
Alexandr 22 ноября 2001 г. 14:02 В ответ на: Ответ: Если я правильно понял, то Вы не совсем правы, коллега. отправлено Сергей Борщ 22 ноября 2001 г. 12:48 |
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Я утверждаю, что если в примере даном ниже (App note: Implementing a UART Function with Timer_A3) с кварцем 8 МГц задержку в блоке SetupOsc поменять с 0xFF на 0x01, то схема сравнения начнет сбиваться и не давать точных временных интервалов при передаче. Сбои будут не периодическими и довольно случайными.
#include "msp430x11x1.h"
;******************************************************************************
; MSP430x11x(1) Demo - 9600-baud UART using 3.579545Hz Crystal
;
; Description: This program demonstrates a half-duplex 9600-baud UART using
; Timer_A3 and a 3.58Mhz crystal. The program will wait in LPM0, echoing
; back a received character using 8N1 protocol.
;
; MSP430F1121
; -----------------
; /|\| XIN|-
; | | | 3.58Mhz
; --|RST XOUT|-
; | |
; | | 9600 8N1
; | TX/P1.1|-------->
; | TX/P2.2|<--------
;
; CPU registers used
#define RXTXData R4
#define BitCnt R5
;
; Conditions for 9600 Baud HW/SW UART, ACLK = 3.579545MHz
Bitime_5 equ 0186 ; 0.5 bit length
Bitime equ 0373 ; 104 us
RXD set 004h ; RXD on P2.2
TXD set 002h ; TXD on P1.1
;
; M.Buccini
; Texas Instruments, Inc
; January 2001
;******************************************************************************
;-----------------------------------------------------------------------------
ORG 0F000h ; Program Start
;-----------------------------------------------------------------------------
RESET mov.w #300h,SP ; Initialize Stackpointer
call #Init_Sys ; Initialize System Peripherals
;
Mainloop call #RX_Ready ; UART ready to RX one Byte
bis.w #LPM0,SR ; Enter LPM0 Until Byte RXed
call #TX_Byte ; TX Back RXed Byte Received
jmp Mainloop ;
;
;-----------------------------------------------------------------------------
Init_Sys; Initialize System Peripherals
;-----------------------------------------------------------------------------
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
SetupC0 mov.w #OUT,&CCTL0 ; TXD Idle as Mark
SetupTA mov.w #TASSEL0+MC1,&TACTL ; ACLK, continous mode
SetupP1_2 bis.b #TXD,&P1SEL ; P1.1/TA0 for TXD function
bis.b #TXD,&P1DIR ; TXD output on P1
bis.b #RXD,&P2SEL ; P2.2/TA0 as RXD input
SetupBC bis.b #XTS,&BCSCTL1 ; ACLK = LFXT1 HF XTAL
SetupOsc bic.b #OFIFG,&IFG1 ; Clear OSC fault flag
mov.b #0FFh,R15
SetupOsc1 dec.b R15 ; Ddelay to ensure startup
jnz SetupOsc1
bit.b #OFIFG,&IFG1 ; OSC fault flag set?
jnz SetupOsc ;
bis.b #SELM1+SELM0,&BCSCTL2 ; (CPU) MCLK = LFXT1
eint ; General enable interrupts
ret ; Return from subroutine
;
;-----------------------------------------------------------------------------
TX_Byte; Subroutine that will TX Byte from RXTXData Buffer
;-----------------------------------------------------------------------------
mov.w #TX_Count,BitCnt ; TX_Count --> Branch Pointer
mov.w &TAR,&CCR0 ; Current state of TA Counter
mov.w #OUTMOD2+OUTMOD0+CCIE,&CCTL0 ; TXD = Space = Start Bit
TX_Wait bit.w #CCIE,&CCTL0 ; Wait for TX completion
jnz TX_Wait ;
ret ; Return from subroutine
;
;-----------------------------------------------------------------------------
RX_Ready; Subroutine that Readies UART to RX Byte into RXTXData Buffer
;-----------------------------------------------------------------------------
mov.w #RX_Count,BitCnt ; RX_Count --> Branch Pointer
mov.w #CCIS0+CM1+CAP+OUT+CCIE,&CCTL0 ; Neg Edge, Capture, Out
ret ; Return from subroutine
;
;-----------------------------------------------------------------------------
TA0_ISR; CCR0/UART ISR, RXTXData Buffer holds UART Data
;-----------------------------------------------------------------------------
add.w #Bitime,&CCR0 ; Bitime till next bit
br @BitCnt+ ; Branch To Routine
;
TX_Bit rra.b RXTXData ; LSB is shifted to carry
jc TX_Mark ; Jump if bit = 1
TX_Space bis.w #OUTMOD2,&CCTL0 ; TX Space
reti ;
TX_Comp bic.w #CCIE,&CCTL0 ; All Bits RX, disable interrupt
TX_Mark bic.w #OUTMOD2,&CCTL0 ; TX Mark
reti ;
RX_Edge bic.w #CAP,&CCTL0 ; Switch to Compare mode
add.w #Bitime_5,&CCR0 ; First Databit 1.5 Bits from edge
reti ;
RX_Bit bit.w #SCCI,&CCTL0 ; Get bit waiting in SCCI
rrc.b RXTXData ; Store received bit
reti ;
;>>>>>>>>>> Decode of Received Byte Here <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<
RX_Comp bic.w #CCIE,&CCTL0 ; All Bits RXed, Disable Interrupt
mov.w #GIE,0(SP) ; Decode Byte= Active in Mainloop
reti ;
;>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>><<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<
EVEN
RX_Count DW RX_Edge ; Special for TA
DW RX_Bit ; RX First Data Bit
DW RX_Bit ;
DW RX_Bit ;
DW RX_Bit ;
DW RX_Bit ;
DW RX_Bit ;
DW RX_Bit ;
DW RX_Bit ;
DW RX_Comp ; RX Complete, process RX data
TX_Count DW TX_Bit ; TX First Data Bit
DW TX_Bit ;
DW TX_Bit ;
DW TX_Bit ;
DW TX_Bit ;
DW TX_Bit ;
DW TX_Bit ;
DW TX_Bit ;
DW TX_Mark ; TX Stop Bit= Mark
TX_End DW TX_Comp ; TX Complete and Complete
;
;-----------------------------------------------------------------------------
; Interrupt Vectors Used MSP430x11x1
;-----------------------------------------------------------------------------
ORG 0FFFEh ; MSP430 RESET Vector
DW RESET ;
ORG 0FFF2h ; Timer_A0 Vector
DW TA0_ISR ;
END
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