 Разработка, производство и продажа радиоэлектронной аппаратуры  |
Требуется программист в Зеленограде
- обработка данных с датчиков; ColdFire; 40 тыс. e-mail:jobsmp@pochta.ru |
Это полностью рабочий код приёмника RC5 - проверенно!
Очень нужно для CodeVision.
Пожалуйста кто может помогите...
.include "C:\Avrtools\appnotes\2313def.inc"
.device AT90S1200
.equ INPUT =0 ;PD2
.equ SYS_ADDR =0 ;The system address
.def S =R0
.def inttemp =R1
.def ref1 =R2
.def ref2 =R3
.def temp =R16
.def timerL =R17
.def timerH =R16
.def system =R19
.def command =R20
.def bitcnt =R21
.cseg
.org 0
rjmp reset
.org OVF0addr
TIM0_OVF: in S,sreg
inc timerL ;Updated every 64us
inc inttemp
brne TIM0_exit
inc timerH
TIM0_exit: out sreg,S
reti
reset:
ldi temp,0b00000001 ;Timer/Counter 0 clocked at CK
out TCCR0,temp
ldi temp,1< ldi temp,0b11111111 ;PORTB as output sei ;Enable gobal iterrupt main: rcall detect ;Call RC5 detect routine cpi system,SYS_ADDR ;Respponds only at the specified address andi command,0x3F ;Remove control bit rjmp main detect: clr inttemp detect1: clr timerL detect2: cpi timerH,8 ;If line not idle within 131ms dl1: cpi timerL,55 ;If line low for 3.5ms sbis PIND,INPUT ;If line is sbic PIND,INPUT ;Wait for start bit sbis PIND,INPUT mov temp,timerL ;timer is 1/2 bit time mov ref1,temp sbic PIND,INPUT ;Wait for falling edge start bit 2 clr timerL sbic PIND,INPUT ;Synchronize timing clr timerL bit_is_a_1: sec ;Store a '1' clr timerL nextbit: dec bitcnt ;If bitcnt > 0 mov temp,command ;Place system bits in "system" bst system,5 ;Move toggle bit ;Clear remaining bits ret fault: ser command ;Both "command" and "system"
out DDRB,temp
brne release
out PORTB,command
release: clr command ;Clear PORTB
out PORTB,command
rjmp main
clr timerH
brlo dl1
rjmp fault ; then exit
brge start1 ; then wait for start bit
rjmp detect1 ; low - jump to detect1
rjmp detect2 ; high - jump to detect2
start1: cpi timerH,8 ;If no start bit detected
brge fault ;within 130ms then exit
rjmp start1
clr timerL ;Measure length of start bit
start2: cpi timerL,17 ;If startbit longer than 1.1ms,
brge fault ; exit
rjmp start2
;Positive edge of 1st start bit
clr timerL
lsr ref1
mov ref2,ref1
add ref1,temp ;ref1 = 3/4 bit time
lsl temp
add ref2,temp ;ref2 = 5/4 bit time
start3: cp timerL,ref1 ;If high periode St2 > 3/4 bit time
brge fault ; exit
rjmp start3
ldi bitcnt,12 ;Receive 12 bits
clr command
clr system
sample: cp timerL,ref1 ;Sample INPUT at 1/4 bit time
brlo sample
rjmp bit_is_a_1 ;Jump if line high
bit_is_a_0: clc ;Store a '0'
rol command
rol system
bit_is_a_0a: cp timerL,ref2 ;If no edge within 3/4 bit time
brge fault ; exit
sbis PIND,INPUT ;Wait for rising edge
rjmp bit_is_a_0a ;in the middle of the bit
rjmp nextbit
rol command
rol system
;Synchronize timing
bit_is_a_1a: cp timerL,ref2 ;If no edge within 3/4 bit time
brge fault ; exit
sbic PIND,INPUT ;Wait for falling edge
rjmp bit_is_a_1a ;in the middle of the bit
brne sample ; get next bit
rol temp
rol system
rol temp
rol system
bld command,6 ;to "command"
andi command,0b01111111
andi system,0x1F
ser system ;0xFF indicates failure
ret
Ответы
