TWAR TWA6 TWA5 TWA4 TWA3 TWA2 TWA1 TWA0 TWGCE
value Device’s Own Slave Address

The upper seven bits are the address to which the Two-wire Serial Interface will respond
when addressed by a Master. If the LSB is set, the TWI will respond to the general call
address (0x00), otherwise it will ignore the general call address.

TWCR TWINT TWEA TWSTA TWSTO TWWC TWEN – TWIE
value 0 1 0 0 0 1 0 X

TWEN must be written to one to enable the TWI. The TWEA bit must be written to one
to enable the acknowledgement of the device’s own slave address or the general call
address. TWSTA and TWSTO must be written to zero.
When TWAR and TWCR have been initialized, the TWI waits until it is addressed by its
own slave address (or the general call address if enabled) followed by the data direction
bit. If the direction bit is “1” (read), the TWI will operate in ST mode, otherwise SR mode
is entered. After its own slave address and the write bit have been received, the TWINT
Flag is set and a valid status code can be read from TWSR. The status code is used to
determine the appropriate software action. The appropriate action to be taken for each
status code is detailed in Table 69. The Slave Transmitter mode may also be entered if
arbitration is lost while the TWI is in the Master mode (see state 0xB0).