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TMS320F2808
100 MHz (10-ns Cycle Time) High-Performance 32-Bit CPU
16 x 16 and 32 x 32 MAC Operations
16 x 16 Dual MAC
Harvard Bus Architecture
Atomic Operations
Fast Interrupt Response and Processing
Unified Memory Programming Model
Code-Efficient (in C/C++ and Assembly)
On-Chip Memory
F2808: 64K X 16 Flash, 18K X 16 SARAM
F2806: 32K X 16 Flash, 10K X 16 SARAM
F2801: 16K X 16 Flash, 6K X 16 SARAM
1K x 16 OTP ROM
Boot ROM (4K x 16) With Software Boot Modes (via SCI, SPI, CAN, I2C, and Parallel I/O)
Standard Math Tables
Clock and System Control
Dynamic PLL Ratio Changes Supported
On-Chip Oscillator
Clock-Fail-Detect Mode
Watchdog Timer Module
Any GPIO A Pin Can Be Connected to One of the Three External Core Interrupts
Peripheral Interrupt Expansion (PIE) Block That Supports All 43 Peripheral Interrupts
128-Bit Security Key/Lock
Protects Flash/OTP/L0/L1 Blocks
Prevents Firmware Reverse Engineering
Enhanced Control Peripherals
Up to 16 PWM Outputs
Up to Four Capture Inputs
Up to Two Quadrature Encoder Interfaces
Up to Six 32-bit Timers
Up to Six 16-bit Timers
Serial Port Peripherals
Up to 4 Serial Peripheral Interface (SPI) Modules
Up to 2 Serial Communications Interface (SCI), Standard UART Modules
Up to 2 Enhanced Controller Area Network (eCAN) Modules
One Inter-Integrated-Circuit (I2C) Bus
12-Bit ADC, 16 Channels
Fast Conversion Rate: 160 ns/6.25 MSPS
2 x 8 Channel Input Multiplexer
Two Sample-and-Hold
Single/Simultaneous Conversions
Internal or External Reference
E-mail: 
info@telesys.ru
