Отправлено zlyh 30 июля 2004 г. 14:55 В ответ на: Генерация случайных чисел на VHDL (поведенчески) отправлено Volodymyr 30 июля 2004 г. 11:56

procedure UNIFORM(variable Seed1,Seed2:inout integer;variable X:out real) is
-- returns a pseudo-random number with uniform distribution in the
-- interval (0.0, 1.0).
-- Before the first call to UNIFORM, the seed values (Seed1, Seed2) must
-- be initialized to values in the range [1, 2147483562] and
-- [1, 2147483398] respectively. The seed values are modified after
-- each call to UNIFORM.
-- This random number generator is portable for 32-bit computers, and
-- it has period ~2.30584*(10**18) for each set of seed values.
--
-- For VHDL-1992, the seeds will be global variables, functions to
-- initialize their values (INIT_SEED) will be provided, and the UNIFORM
-- procedure call will be modified accordingly.

variable z, k: integer;
begin
k := Seed1/53668;
Seed1 := 40014 * (Seed1 - k * 53668) - k * 12211;

if Seed1 < 0 then
Seed1 := Seed1 + 2147483563;
end if;

k := Seed2/52774;
Seed2 := 40692 * (Seed2 - k * 52774) - k * 3791;

if Seed2 < 0 then
Seed2 := Seed2 + 2147483399;
end if;

z := Seed1 - Seed2;
if z < 1 then
z := z + 2147483562;
end if;

X := REAL(Z)*4.656613e-10;
end UNIFORM;

• Исходник из ихней древней версии. Правильно вот так: procedure uniform(variable seed1,seed2:inout positive; variable x:out real); — zlyh   (30.07.2004 14:59, пустое)