Отправлено DM 06 августа 2001 г. 19:43

По выставлению адреса хочу строб поиметь. write потом увяжу

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library IEEE;
use IEEE.std_logic_1164.all;

entity Comparator is
port (ADH_ISA1: in STD_LOGIC_VECTOR (5 downto 0);
AD_SET1: in STD_LOGIC_VECTOR (5 downto 0);
Enable : out std_logic
);
end;

architecture Comparator_arch of Comparator is
begin
process (ADH_ISA1, AD_SET1)
begin
if ADH_ISA1 = AD_SET1 then Enable <= '1';
else Enable <= '0';
end if;
end process;
end Comparator_arch;

library IEEE;
use IEEE.std_logic_1164.all;

entity Decoder is
port
(Enable : in std_logic;
data_in : in std_logic_vector(3 downto 0);
data_out : out std_logic_vector(15 downto 0);
Aen : in std_logic
);
end;

architecture Decoder_arch of Decoder is
begin
process (Aen, Enable, data_in)
begin
if Enable = '1' and Aen = '0' then
case data_in is
when "0000" => data_out <= "0000000000000001";
when "0001" => data_out <= "0000000000000010";
when "0010" => data_out <= "0000000000000100";
when "0011" => data_out <= "0000000000001000";
when "0100" => data_out <= "0000000000010000";
when "0101" => data_out <= "0000000000100000";
when "0110" => data_out <= "0000000001000000";
when "0111" => data_out <= "0000000010000000";
when "1000" => data_out <= "0000000100000000";
when "1001" => data_out <= "0000001000000000";
when "1010" => data_out <= "0000010000000000";
when "1011" => data_out <= "0000100000000000";
when "1100" => data_out <= "0001000000000000";
when "1101" => data_out <= "0010000000000000";
when "1110" => data_out <= "0100000000000000";
when "1111" => data_out <= "1000000000000000";
when others => null;
end case;
else data_out <= "0000000000000000";
end if;
end process;
end Decoder_arch;

library IEEE;
use IEEE.std_logic_1164.all;

entity AddrSell is
port (
wr: in STD_LOGIC;
re: in STD_LOGIC;
ADH_ISA: in STD_LOGIC_VECTOR (5 downto 0);
AD_SET: in STD_LOGIC_VECTOR (5 downto 0);
AEN: in STD_LOGIC;
ADL_ISA: in STD_LOGIC_VECTOR (3 downto 0);
chipset: out STD_LOGIC_VECTOR (15 downto 0)

);
end AddrSell;

architecture AddrSell_arch of AddrSell is

component
Comparator
port (ADH_ISA1: in STD_LOGIC_VECTOR (5 downto 0);
AD_SET1: in STD_LOGIC_VECTOR (5 downto 0);
Enable : out std_logic
);
end component;

component
Decoder
port (Enable : in std_logic;
data_in : in std_logic_vector(3 downto 0);
data_out : out std_logic_vector(15 downto 0);
Aen : std_logic
);
end component;

signal En_write : std_logic;
begin

Com1 : Comparator
port map (ADH_ISA, AD_SET, En_write);

Dec1 : Decoder
port map (En_write, ADL_ISA, chipset, aen);

end AddrSell_arch;

• ОК. Всё заработало. Дело было не в...... Просто 2 провода перегнулись — DM   (07.08.2001 15:55, пустое)
• А как именно не работает, в железе ? (-) — Kota   (07.08.2001 11:28, пустое)
• ALE указывает что на шине действительный адрес и его можно защелкивать устройствам в свои регистры(+) — Vladimir   (07.08.2001 11:10, 80 байт)
• Вот не помню времянку ISA как там с сигналом ALE. Когда есть выборка её запомнить не надо до появления ALE и других сигналов. — Fachmann   (07.08.2001 01:27, пустое)