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Cjip executes Java bytecode without needing any accelerator hardware or software interpreter or JIT compiler
The aJ-100 is the second generation of the revolutionary JEM™ processors, which was first developed at Rockwell Collins. With an embedded real-time kernel, the aJ-100 is designed for real-time embedded Java™ applications that require high-performance and low-power consumption.
JSTAR™ is a low-cost and high-performance intermediate language coprocessor targeted for the Java™ Platform that is fully compliant with all Java technology standards and Sun authorized Virtual Machine implementations. JSTAR is a Java bytecode interpreter implemented in silicon that retrieves Java bytecode instructions from memory and interprets them on the fly into an optimum sequence of native CPU instructions that are fed directly to the CPU for immediate execution. In essence, a JSTAR enhanced microprocessor becomes bilingual, processing 160 of the 227 Java bytecodes with the same efficiency as its own native CPU instructions. The 160 Java bytecodes processed by JSTAR assume a RISC microprocessor without a floating-point unit (FPU). If an FPU is available the number of Java bytecode instructions interpreted in hardware will increase by the floating-point operations directly supported by the FPU.
The JSTAR Synthesizable Core Consisting of synthesizable Verilog RTL Silicon Intellectual Property, a typical JSTAR implementation with a 32-bit RISC microprocessor takes 30,000 logic gates. Any semiconductor foundry can implement JSTAR's synthesizable design. In a 0.18-micron process, JSTAR occupies less than one square millimeter with power consumption of 0.18 mW/MHz at 1.5 volts. JSTAR includes detailed implementation documentation, a verification suite, and a software kernel that works with any JVM or J2ME configuration, coupled with integration services and support. JSTAR is readily available for MIPS® microprocessors and ARM® microprocessors running Personal JWorks™, PersonalJava™, the J2ME CDC™ and the J2ME CLDC™.